Logical OR Gate
OR gate performs logical OR operation which means outputs is logical 1 if at least one of the inputs is 1. Just like AND gate an OR gate may also have two or any more numbers of inputs but only one output. Only if all of the inputs are only in low state or logical 0 the output is low or 0 and in all other inputs conditions the output will be high or logical 1.
The logical symbol of OR gate is shown below,
Truth Table of OR GateFrom above explanation the truth table of logical OR gate can be represented as, Logical OR gate can be of more than two inputs as we told earlier. In that case logical symbol and truth table would be,
Realization of OR GateLike AND gate and OR gate can also be realized by using Diode or transistor circuit.
Diode OR GateA simple two inputs OR gate can be realized by using diode as follows, In the above circuit, if A and B are applied with 0V, there will be no voltage appears at X. When any of the inputs is given with +5V, the respective diode becomes forward biased and behaves as ideally short circuited hence this +5 V will appear at output X. +5 V means logical 1. Actually entire 5V will not appear at X, around 0.6 to 0.7 V will drop across the diode as forward bios voltage and rest of the voltage i.e. 5 – 0.6 = 4.4 V or 5 – 0.7 = 4.3 V will appear at X. This 4.4 V or 4.3 V is practically considered as logical 1.
Now if both of the inputs are given with +5 V, both diodes will be forward biased. Hence, similarly 4.4 V will appear at X. Now if both of the inputs A and B are grounded or given 0V, There will be no voltage appears at X and hence X is considered as logical 0.
Transistor OR GateThe OR gate can also be realized by using transistor. In this case the OR gate is referred as transistor OR gate. Two inputs such OR gate is shown below, Now if A and B both are given with 0V, both of the transistor are in OFF condition, hence supply voltage + 5 V will not get path to the ground through either of the transistors, T1 and T2. As a result base of the transistor T3 will get enough potential to make it ON. In that condition supply + 5 V will get path to ground through resistor R′ and transistor T3. As the transistor T3 is in ON condition it will behaves as ideally short circuited, hence entire supply voltage + 5 V will drop across resistor Rʹ and X terminal (Node) will get 0V. In practice, transistor T3 will not be ideal short circuited it will have some voltage drop across it which will be around 0.6 – 0.7 V. This voltage will appear at node X and this 0.6 or 0.7 volt is considered as logical 0.
Now, if base terminal either of the transistors T1 or T2 or both are given with + 5 V, the respective transistor as both will be in ON condition. In that case supply voltage + 5 V will get path to ground through either of the transistors or both.
As a result current starts flowing to the ground from supply through this path, and entire supply voltage will drop across resistor R. So, the base of transistor T3 will not get sufficient potential to make the transistor T3 ON. Hence entire supply voltage will appear at X and the X becomes at high logical state or logical 1.