OR Gate: What is it? (Working Principle & Circuit Diagram)

What Is An Or Gate

What is an OR Gate?

An OR gate is a logic gate that performs logical OR operation. A logical OR operation has a high output (1) if one or both the inputs to the gate are high (1). If neither input is high, a low output (0) results. Just like an AND gate, an OR gate may have any number of input probes but only one output probe.

The function of a logical OR gate effectively finds the maximum between two binary digits, just as the complementary AND function finds the minimum.

The logical symbol of 2 input OR gate is shown below:
symbol of or gate

OR Gate Truth Table

2 Input OR Gate

Truth tables list the output of a particular digital logic circuit for all the possible combinations of its inputs. The truth table of a 2 input OR gate can be represented as:OR gate truth table

3 Input OR Gate

If instead of two inputs there are three inputs, this changes the logical symbol and truth table of the OR gate.

The logical symbol of a 3-input OR gate is represented as:3 input or gate symbol

The truth table of a 3 input OR gate is:
3 input or gate truth table

In digital electronics, other logic gates include NOT gates, NAND gates, NOR gates, XOR gates, XNOR gates.

OR Gate Circuit Diagram

Like AND gate and OR gate can also be realized by using a diode or transistor circuit.

OR Gate Diode Circuit Diagram

A simple two inputs OR gate can be realized by using a diode as follows,
OR Gate Diode Circuit Diagram
In the above circuit, if A and B are applied with 0V, there will be no voltage appears at X. When any of the inputs is given with +5V, the respective diode becomes forward biased and behaves as ideally short circuited hence this +5 V will appear at output X. +5 V means logical 1.

Actually entire 5V will not appear at X, around 0.6 to 0.7 V will drop across the diode as forwarding bios voltage, and the rest of the voltage i.e. 5 – 0.6 = 4.4 V or 5 – 0.7 = 4.3 V will appear at X. This 4.4 V or 4.3 V is practically considered as logical 1.

OR Gate Diode Diagram
Now if both of the inputs are given with +5 V, both diodes will be forward biased. Hence, similarly, 4.4 V will appear at X.
OR Gate Diode Diagram on
Now if both of the inputs A and B are grounded or given 0V, There will be no voltage appears at X and hence X is considered as logical 0.

OR Gate Transistor Circuit Diagram

The OR gate can also be realized by using a transistor. In this case, the OR gate is referred to as the transistor OR gate. Two inputs such OR gate is shown below,
OR Gate Transistor Circuit Diagram
Now if A and B both are given with 0V, both of the transistors are in OFF condition, hence supply voltage + 5 V will not get the path to the ground through either of the transistors, T1 and T2. As a result base of the transistor T3 will get enough potential to make it ON. In that condition supply + 5 V will get the path to ground through resistor R′ and transistor T3.

As the transistor T3 is in ON condition it will behave as ideally short circuited, hence the entire supply voltage + 5 V will drop across resistor Rʹ and X terminal (Node) will get 0V. In practice, transistor T3 will not be ideal short circuited it will have some voltage drop across it which will be around 0.6 – 0.7 V. This voltage will appear at node X, and this 0.6 or 0.7 volt is considered as logical 0.

Now, if the base terminal either of the transistors T1 or T2 or both are given with + 5 V, the respective transistor as both will be in ON condition. In that case, supply voltage + 5 V will get the path to ground through either of the transistors or both.

As a result, current starts flowing to the ground from supply through this path, and the entire supply voltage will drop across resistor R. So, the base of transistor T3 will not get sufficient potential to make the transistor T3 ON. Hence entire supply voltage will appear at X and the X becomes at a high logical state or logical 1.

OR Gate Integrated Circuits

OR gate is available in TTL and CMOS ICS, Where TTL is Transistor – Transistor Logic ICs and CMOS are Complementary MOSFET ICS. We will now discuss the arrangement of the OR gate on both the ICs.

In CMOS ICs the 4000 series is available. In digital electronic 4071 is the CMOS IC number of inputs in each gate is two. 4075 is 3 – input OR gate and 4072 is 4 – input OR gate in CMOS ICs. An internal gate picture of 4071 can help you understand this IC.

OR Gate IC 4071

4071 is a 14 pin 1C as you can see where four or gates are fixed together having two inputs. Pin number 14 is tvcc where maximum SV DC supply is given which activates the IC. Pin number 7 is grounded.

or gate ic 4071

Pin 1 and 2 are the input for the first gate and 3 is the respective output for the first gate. Pin numbers 5 and 6 are inputs for the second gate whose output is pin number 4. For the third gate pin number 8 and 9 are the inputs whose output is pin number 10 for the last gate pin number 12 and 13 are the inputs whose respective output is at pin number 11. Thus how the IC looks internally for CMOS.
OR gate ic 4071

OR Gate IC 7432

In TTL logic the internal arrangement differs from that incase of CMOS logics. In TTL logic 2- input OR gate IC number is 74LS32. popularly known as 7432. LS stands for a low power schottky version.

Again one more type of IC number is also available in the market which is 74HC32 where HC stands for high-speed CMOS version i.e. it has lower current consumption and wider voltage range. 74LVC32 is another low voltage CMOS version of the same. Let us have a discussion on 74LS32 which is a TTL IC. In this IC there are fourteen pins. The internal gate diagram of 7432 can make your idea clear.
or gate ic 7432
In this IC, pin 1 and 2 are the inputs of the first gate where the output is from pin number 3. Again pin numbers 4 and 5 are the inputs of the second gate whose output is in pin 6. Pin 10 and 9 are the inputs of the fourth gate whose output is at pn 8. The input of the last gate or fourth gate is pin 13 and 12 and pin 11 is its output.

Pin 7 is ground and pin 14 is +vcc supply where again +Vcc supply where again +SVdC is the normal and maximum supply. One thing must be maintained at +SVDC. If the i/p voltage would be more than this it may cause damage to the IC.

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