# Logical AND Gate

In digital electronics there are several logical gates which work or operate on different logical operations, say logical addition, logical multiplication etc. **AND Gate** is a logical gate which is widely used having two or more inputs and a single output. This gate works or operates on logical multiplication rules. In this gate if either of the inputs is low (0), then the output is also low, but if all the inputs are high (1) the output will also be high (1).

There are many integrated circuit which works on this logic we will come to it later. First of all let us gather some idea how output with respect to inputs is observed in case of **AND Gate**. We just told that an AND gate performs multiplication operation of binary digits. We also know there are two binary digits 1 and 0. In multiplying 0 with 0 we will get 0, 1 with 0 or 0 with 1 we will get 0. Only we get 1 when 1 is multiplied by 1.

In other words, an AND gate is a digital device which produces high output only when all inputs are high and produces low output at all other inputs conditions. High digital signal means logically 1 and low digital signal means logically 0.

An AND gate may have any number of input probes but only one output probe.

A two input AND gate is logically represented as
Where, A and B represent input of the gate and X represents output. A, B and X either be 1 or 0 logically.

The logical operation of AND gate hence can be represented as
All multiplication combination of A and B can be represented in tabular form as follows,
This table is popularly known as truth table.

If instead of two there are three are numbers of inputs, the logical symbol and truth table of the gate would be,

## Practical Circuit of AND Gate

### Diode AND Gate

Normally an AND gate is designed by either diodes or transistors.While, diodes are used to design AND gate, it is called diode AND gate. The basic circuit of a diode AND gate is shown below In the above circuit we first apply +5V at C. Now if we apply +5V at A and B, both of the diodes are reversed biased and hence behave both diodes as OFF or open circuit. At this situation as both diodes are OFF, no current will flow through resistor R and voltage of C (+5V) will also appears at X. As the supply voltage +5V appears at X, the output of the circuit is considered as high or logical 1. Now, if either point A or B or both are applied with 0 Volt or they are grounded, respective diode will become forward biased and hence behaves as ‘ON’ or short circuited. At this condition, supply voltage +5V at point C will get path through either of diodes or both to the ground potential. As the current flowing from C to ground through resistor R, entire 5V will be dropped across the resistor and hence voltage at X will become low or logically zero. The diodes at forward biased condition do not behave as ideal short circuit; some voltage drop will be there across the forward biased diodes which is equal to forward bias voltage. This voltage drop will appear at X during low output condition, so practically low output will not be 0V it is rather 0.6 to 0.7V which is ideally considered as zero.

### Transistor AND Gate

An AND logic gate can also be realized from transistor AND gate. The circuit diagram of transistor logic gate is shown below. In the above circuit when A or B or both A and B are grounded or at 0V potential transistor T_{1}or T

_{2}or both T

_{1}and T

_{2}are in OFF condition respectively. This is because terminal A and B are base terminal of transistor T

_{1}and T

_{2}respectively. Zero base voltage makes a transistor OFF. As the path through T

_{1}and T

_{2}is open circuited base of transistor T

_{3}enough potential to makes T

_{3}ON. Current then starts flowing the supply to ground through T

_{3}. As a result entire supply voltage will drop across R

^{1}and potential of terminal X will become low or logical zero.

If any of the transistors T_{1} and T_{2} is in OFF condition, same result will come at output X as both the transistors are in series.
Now we will check what will be the logical value of X, if both A and B are at high logical value. If we apply +5V at both A and B i.e. at base of transistor T_{1} and T_{2} respectively.

This makes both the transistor T_{1} and T_{2} are in ON condition. Enter supply voltage will drop across R and the base potential of the transistor T_{3} will be zero and T_{3} becomes in OFF condition. As a result the supply voltage +5V appears at X and X will become logically 1 or high.

## IC 7408

For AND Gate IC number in TTL is 7408. 7408 is Quad 2- input IC where four gates are present together. Let us have a look on the internal diagram of 7408.Here pln 1, 2 are the inputs of the first gate whose respective output is 3. Again 4 and 5 are the inputs of the second gate whose output is at pin 6. The inputs of fourth is pin 12 and 13 and pin 11 is its output. Pin 14 is the supply input which can be maximum 5.2 volt D.C. if input voltage be more than this it may cause damage to the IC.

## IC 4081

In CMOS logic i.e complementary MOSFET logic I.C number of AND Gate is 4081. This IC also has two inputs and one respective output. In this IC there are also 4 gates together. Now see the below internal diagram of this circuit to make it more clear. Pin 1 and 2 are the inputs of the first gate whose output is in number 3. Again Pin 5 and 6 are the inputs of the second gate whose output is at Pin 4. pi number 7 is grounded. Pin 8 and 9 are the inputs of third gate whose output is at pin 10. Again pin 13 and 12 are the inputs of fourth**AND gate**whose output is at pin number 11. Pin 13 and 12 are the inputs of fourth AND Gate whose output is at pin number 11. Pin number 14 is power supply where maximum 5.2 volt D.C supply can be given to activate the IC. Here too if more voltage is given if may damage the IC. Inter circuit of CMOS and TTL differs from each other which must be noticed carefully.

M | MIKE commented on 09/05/2018Is the second transistor figure incorrect (it is the same as the third)? The description says that T1 and T2 should be OFF due to A and B being grounded, resulting in a logical 0 result at X. The figure has T1 and T2 ON with a logical 1 at X. |