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Active Low S R Latch and Flip Flop

Published on 24/2/2012 & updated on Thursday 17th of May 2018 at 03:44:56 PM
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There is one type of latch which is SET when S = 0(LOW), and this latch is known as Active Low S R Latch.This latch is normally designed by using NAND gates. The logical circuit is shown below. Active Low S R Latch

In the above logic circuit if S = 0 and R = 1, Q becomes 1. Let us explain how.

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Active Low S R Latch and Flip Flop

In the above logic circuit if S = 1 and R = 0, Q becomes 0. Let us explain how.

In the above logic circuit if S = 1 and also R = 1, Q remains same as it was. Let us explain how.

In the above logic circuit if S = 0 and also R = 0, the condition of Q is totally unpredictable. Let us explain how.

So, when both S and R are 0, it becomes unpredictable whether the value of output Q will be changed or unchanged. This condition of S R latch normally avoided. truth table of active low s r latch




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