Latches and Flip FlopsPublished on 24/2/2012 and last updated on Thursday 17th of May 2018 at 03:39:02 PM
It can remain in either of the states indefinitely. Its state can be changed by applying the proper triggering signal. Flip flop is one-bit memory element. There are two outputs in a flip-flop generally marked as Q and Either of Q and can be used as output but normal practice is to take Q as output port and as inverted output port. It is to be noted here that a flip flop has always one out complement of other output. The state of a flip-flop is normally determined by the condition of output Q. If Q = 1 the flip-flop is said to be in HIGH state or logic 1 state or SET state. When, Q = 0 the state of flip flop is said to be in LOW state or logic 0 state or RESET state or CLEAR state.
The figure below shows a block diagram of a flip flop. It shows a flip-flop may have one or more inputs but only two outputs. The combination of inputs which alter the outputs or state of flip flop is referred as excitation. The excitation is used to switch the flip flop from one state to other. But the typical feature of flip flop is that once the state of flip flop is changed by applying, excitation, it remains unaltered even the excitation is removed from input ports.
Hence, momentary application of excitation is enough to change the state a flip-flop. This is how flip flop behaves as memory element. When, Q = 1 it stores a 1 and when, Q = 0, it stores a 0. Flip-flops are the basic components of shift registers and counters. Flip flop is a sequential circuit hence it can be either synchronous or asynchronous. When inputs are controlled by clock pulse it is normally referred as flip flop. Here the inputs are applied but not acted until clock pulse appears and enable the inputs. When the same circuit is made asynchronous that is its inputs is not controlled by clock pulse, it is called latch. It is SET or RESET instantaneously on receiving the input signal. Latch can act independently of clock signal.