As we have defined above, a half adder is a simple digital circuit used to digitally add two binary bits. A binary bit is either 0 or 1. Hence, there will be four addition combinations these two binary digits and those will be 0 + 0, 0 + 1, 1 + 0 and 1 + 1.
We know that decimally:
Again, we know that decimal 2 can be represented in two bits binary system as 10 (One Zero). Binary two is the smallest double digits number in the binary system. When we add binary 1 with binary 1 we will get both sum and carry since 10 is two digits binary number. When we add 0 to 0, 0 to 1 and 1 to 0, we get the sum 0 and 1 respectively and both of them are one digit binary number. Hence, in these three cases there will be no carry during addition or carry is 0 here. We can summarise this in a truth table for the half adder.
Half Adder Truth Table
| A | B | A + B | Decimal Output | Binary Output | Sum (A ⊕ B) | Carry (A ⋅ B) |
| 0 | 0 | 0 + 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 0 + 1 | 1 | 1 | 1 | 0 |
| 1 | 0 | 1 + 0 | 1 | 1 | 1 | 0 |
| 1 | 1 | 1 + 1 | 2 | 10 | 0 | 1 |
From the above truth table, we can see that the sum digit of two binary inputs is the outcome of XOR operation and we can realize it by using an XOR gate. Carry digit of those two binary inputs is the outcome of AND operation and we can realize it by an AND gate.
Circuit of Half Adder
So, by using one XOR gate and one AND gate we can easily design a half adder, as shown below.
