# Conversion of Flip Flops

**Conversion of flip-flops**causes one type of flip-flop to behave like another type of flip-flop. In order to make one flip-flop mimic the behavior of another certain additional circuitry and/or connections become necessary.

### Conversion of JK Flip-Flop to SR Flip-Flop

Step 1: Write the Truth Table of the Desired Flip-FlopHere SR flip-flop is to be designed using JK flip-flop. Thus one needs to write the truth table for SR flip-flop.

Step 2: Obtain the Excitation Table for the given Flip-Flop from its Truth Table

Excitation tables provide the details regarding the inputs which must be provided to the flip-flop to obtain a definite next state (Q

_{n+1}) from the known current state (Q

_{n}).

From the truth table of JK flip-flop one can see that Q_{n+1} will become 0 from Q_{n} = 0 for both (i) J = K = 0 and (ii) J = 0 and K =1 (blue entries in first and third rows of the truth table).

This means that to obtain the next state, Q_{n+1} as 0 from the current state Q_{n} = 0, J must be made zero while K can be either 0 or 1. This is indicated by the first row of the excitation table (blue entries in the first row of excitation table) where the value of K is expressed as 'X' indicating don't care condition. Similarly to obtain the next state as 1 from the current state 0, one has to have J equal to 1 while K can be either 0 or 1 (indicated by green entries of the truth table). This leads to the second row of excitation table (green entries) to be filled with values Q_{n} = 0, Q_{n+1} = 1, J = 1 and K = X. On the same grounds, entire excitation table needs to be filled (entries in pink and dark red colors).

Step 3: Append the Excitation Table of the given Flip-Flop to the Truth Table of the Desired Flip-Flop Appropriately to obtain Conversion Table
Here the conversion table is obtained by filling-up the values of the J and K inputs for the given Q_{n} and Q_{n+1}, by referring to the excitation table.
Step 4: Simplify the Expressions for the Inputs of the given Flip-Flop

In this case, one needs to arrive at the logical expressions for the inputs J and K in terms of S, R and Q_{n} using suitable simplification technique like K-map.
Step 5: Design the Necessary Circuit and make the Connections accordingly

Here neither additional circuit nor new connections are necessary.
On the same grounds, one can convert the given flip-flop to any other type of flip-flop as shown below.

### Conversion of JK Flip Flop to D Flip Flop

### Conversion of JK Flip Flop to T Flip Flop

### Conversion of SR Flip Flop to JK Flip Flop

### Conversion of SR Flip Flop to D Flip Flop

### Conversion of SR Flip Flop to T Flip Flop

### Conversion of D Flip Flop to JK Flip Flop

### Conversion of D Flip Flop to SR Flip Flop

### Conversion of D Flip Flop to T Flip Flop

### Conversion of T Flip Flop to JK Flip Flop

### Conversion of T Flip Flop to SR Flip Flop

### Conversion of T Flip Flop to D Flip Flop

**Comments/Feedbacks**

Closely Related Articles Latches and Flip FlopsS R Flip Flop S R LatchActive Low S R Latch and Flip FlopGated S R Latches or Clocked S R Flip FlopsD Flip Flop or D LatchJ K Flip FlopMaster Slave Flip FlopRead Only Memory | ROMProgrammable Logic DevicesProgrammable Array LogicApplication of Flip FlopsShift RegistersBuffer Register and Controlled Buffer RegisterData Transfer in Shift RegistersSerial In Serial Out (SISO) Shift RegisterSerial in Parallel Out (SIPO) Shift RegisterParallel in Serial Out (PISO) Shift RegisterParallel in Parallel Out (PIPO) Shift RegisterUniversal Shift RegistersBidirectional Shift RegisterDynamic Shift RegisterApplications of Shift RegistersUninterruptible Power Supply | UPSJohnson CounterSequence GeneratorRing CounterMore Related Articles Digital ElectronicsBoolean Algebra Theorems and Laws of Boolean AlgebraDe Morgan Theorem and Demorgans LawsTruth Tables for Digital LogicBinary Arithmetic Binary AdditionBinary SubtractionSimplifying Boolean Expression using K MapBinary DivisionExcess 3 Code Addition and SubtractionK Map or Karnaugh MapSwitching Algebra or Boolean AlgebraBinary MultiplicationParallel SubtractorBinary Adder Half and Full AdderBinary SubstractorSeven Segment DisplayBinary to Gray Code Converter and Grey to Binary Code ConverterBinary to BCD Code ConverterAnalog to Digital ConverterDigital Encoder or Binary EncoderBinary DecoderBasic Digital CounterDigital ComparatorBCD to Seven Segment DecoderParallel AdderParallel Adder or SubtractorMultiplexerDemultiplexer555 Timer and 555 Timer WorkingLook Ahead Carry AdderOR Operation | Logical OR OperationAND Operation | Logical AND OperationLogical OR GateLogical AND GateNOT GateUniversal Gate | NAND and NOR Gate as Universal GateNAND GateDiode and Transistor NAND Gate or DTL NAND Gate and NAND Gate ICsX OR Gate and X NOR GateTransistor Transistor Logic or TTLNOR GateFan out of Logic GatesINHIBIT GateNMOS Logic and PMOS LogicSchmitt GatesLogic Families Significance and Types of Logic FamiliesBinary Number System | Binary to Decimal and Decimal to Binary ConversionBinary to Decimal and Decimal to Binary ConversionBCD or Binary Coded Decimal | BCD Conversion Addition SubtractionBinary to Octal and Octal to Binary ConversionOctal to Decimal and Decimal to Octal ConversionBinary to Hexadecimal and Hex to Binary ConversionHexadecimal to Decimal and Decimal to Hexadecimal ConversionGray Code | Binary to Gray Code and that to Binary ConversionOctal Number SystemDigital Logic Gates2′s Complement1′s ComplementASCII CodeHamming Code2s Complement ArithmeticError Detection and Correction Codes9s complement and 10s complement | SubtractionSome Common Applications of Logic GatesKeyboard EncoderAlphanumeric codes | ASCII code | EBCDIC code | UNICODENew Articles Acidity Test of Transformer Insulating OilMagnetic FluxRing CounterDischarging a CapacitorCharging a Capacitor