# Binary Decoder

^{n}output lines. In functionality, a

**binary decoder**converts a definite sequence of input bits into a specific pattern as decided by the user based on the requirement. Figure 1 shows a binary decoder with one enable pin and 3 input lines which further results in 8 lines at its output. The output sequence of a decoder for a particular input pattern is realized using its truth table.

Table I shows the truth table for the decoder of Figure 1 which shows that when the enable is low, all the output lines are low, no matter what the input sequence be. This indicates the OFF state of the decoder which can also be considered to be its reset state. Thus one has to drive high on the enable pin to realize the functionality of the decoder.
Table I shows that for the input sequence I_{2}I_{1}I_{0} = 000, the output pin O_{0} of the decoder is high while all other bits (O_{7} down to O_{1}) remain low. Likewise, for the input sequence of 001, only O_{1} is high. Similar observation shows that only one output line is high for any given input bit pattern i.e. O_{2} is high for 010, O_{3} is high for 011, O_{4} is high for 100, O_{5} is high for 101, O_{6} is high for 110 and O_{7} is high for 111. Thus the Boolean equations for the outputs of the 3 to 8 decoder shown in Figure 1 are given by
Equations (1) to (8) show that the decoder of Figure 1 can be designed using AND gate and NOT gate as shown by Figure 2. This is due to the fact that the output lines are nothing but the logical and of either input (blue lines) or its negation (red lines) with the enable signal (black line).
The analogy presented here for 3 to 8 decoder holds good for any n to 2^{n} decoder. However the output bit pattern need not be the same as the one explained. These kind of decoders are used in the applications such as data multiplexing, seven segment display and so on.

### Video Presentation of Binary Decoder

**Comments/Feedbacks**

Closely Related Articles Binary Adder Half and Full AdderBinary SubstractorSeven Segment DisplayBinary to Gray Code Converter and Grey to Binary Code ConverterBinary to BCD Code ConverterAnalog to Digital ConverterDigital Encoder or Binary EncoderBasic Digital CounterDigital ComparatorBCD to Seven Segment DecoderParallel AdderParallel Adder or SubtractorMultiplexerDemultiplexer555 Timer and 555 Timer WorkingLook Ahead Carry AdderMore Related Articles Digital ElectronicsBoolean Algebra Theorems and Laws of Boolean AlgebraDe Morgan Theorem and Demorgans LawsTruth Tables for Digital LogicBinary Arithmetic Binary AdditionBinary SubtractionSimplifying Boolean Expression using K MapBinary DivisionExcess 3 Code Addition and SubtractionK Map or Karnaugh MapSwitching Algebra or Boolean AlgebraBinary MultiplicationParallel SubtractorOR Operation | Logical OR OperationAND Operation | Logical AND OperationLogical OR GateLogical AND GateNOT GateUniversal Gate | NAND and NOR Gate as Universal GateNAND GateDiode and Transistor NAND Gate or DTL NAND Gate and NAND Gate ICsX OR Gate and X NOR GateTransistor Transistor Logic or TTLNOR GateFan out of Logic GatesINHIBIT GateNMOS Logic and PMOS LogicSchmitt GatesLogic Families Significance and Types of Logic FamiliesBinary Number System | Binary to Decimal and Decimal to Binary ConversionBinary to Decimal and Decimal to Binary ConversionBCD or Binary Coded Decimal | BCD Conversion Addition SubtractionBinary to Octal and Octal to Binary ConversionOctal to Decimal and Decimal to Octal ConversionBinary to Hexadecimal and Hex to Binary ConversionHexadecimal to Decimal and Decimal to Hexadecimal ConversionGray Code | Binary to Gray Code and that to Binary ConversionOctal Number SystemDigital Logic Gates2′s Complement1′s ComplementASCII CodeHamming Code2s Complement ArithmeticError Detection and Correction Codes9s complement and 10s complement | SubtractionSome Common Applications of Logic GatesKeyboard EncoderAlphanumeric codes | ASCII code | EBCDIC code | UNICODELatches and Flip FlopsS R Flip Flop S R LatchActive Low S R Latch and Flip FlopGated S R Latches or Clocked S R Flip FlopsD Flip Flop or D LatchJ K Flip FlopMaster Slave Flip FlopRead Only Memory | ROMProgrammable Logic DevicesProgrammable Array LogicApplication of Flip FlopsShift RegistersBuffer Register and Controlled Buffer RegisterData Transfer in Shift RegistersSerial In Serial Out (SISO) Shift RegisterSerial in Parallel Out (SIPO) Shift RegisterParallel in Serial Out (PISO) Shift RegisterParallel in Parallel Out (PIPO) Shift RegisterUniversal Shift RegistersBidirectional Shift RegisterDynamic Shift RegisterApplications of Shift RegistersUninterruptible Power Supply | UPSConversion of Flip FlopsJohnson CounterSequence GeneratorRing CounterNew Articles Principle of Water Content Test of Insulating OilCollecting Oil Sample from Oil Immersed Electrical EquipmentCauses of Insulating Oil DeteriorationAcidity Test of Transformer Insulating OilMagnetic Flux