Parity GeneratorPublished on 24/2/2012 & updated on 2017-05-23 20:34:35
HOME / DIGITAL ELECTRONICS / SQUENTIONAL CIRCUIT
Parity checking is a method in which an extra bit called parity bit is appended, usually at the MSB, of the data stream which needs to be transmitted. Now, how to decide whether to add 1 or 0? This depends on whether we desire to have odd parity or even parity.
Odd ParityThis is the case wherein the number of ones in the bit stream sent (data bits in conjunction with parity-bit) has to be maintained as an odd number. That is, suppose we have our bit stream as 1001011, then the parity would be generated as 1 such that the number of ones in the resulting bit-stream (= 11001011) is 5, an odd number. Reasoning in similar fashion, we can say that for the data sequence of 1001010, the parity-bit should necessarily be 0.
Even ParityIn case if we opt for even parity, then we need to ensure that the total number of ones in the bit stream, including the parity bit, becomes an even number. For example, if the data string is 1001011, then the parity-bit would be 0; while if it is 1001010, then parity-bit should be 1. Now, let us try to design a digital circuit which can help us generate our parity-bit.
Odd Parity GeneratorLet us assume that we have a three-bit data sequence (B2B1B0) which needs to be communicated. Table I shows the parity bits (OP) which must be generated by our circuit for each combination of input bits. Table I
Even Parity GeneratorLet us now design an even parity (EP) generator for two-bit data word B1B0. The associated truth table is as shown by Table II. Table II
Please Rate this Article