# Digital Comparator

**digital comparator**. For understanding better let us consider two single bit binary numbers A and B. The value of A and B either be 0 or 1 and nothing else. Now let us logically design a circuit which will have two inputs one for A and other for B and have three output terminals, one for A > B condition, one for A = B condition and one for A < B condition. Let us name the output terminals G, E and L respectively.We want, G = 1 ( logically 1 ) when A > B. B = 1 ( logically 1 ) when A = B. And L = 1 ( logically 1 ) when A < B. If we successfully design this logic circuit, it will confidently compare two single bit binary numbers A, B and gives high state at respective output terminal according to the comparison conditions of A and B.

A | B | G | E | L |

0 | 0 | 0 | 1 | 0 |

0 | 1 | 0 | 0 | 1 |

1 | 0 | 1 | 0 | 0 |

1 | 1 | 0 | 1 | 0 |

Now from above table, we get,
This circuit can be realized as,
As the above can only compare two single bit binary numbers, it is called single bit digital comparator.
The binary number system normally does not use single binary numbers instead it uses multi bit binary numbers which are normally 4 bits and above. So, let us design a 4 bit **digital comparator** to get more clear idea of comparator.
Suppose, there are two 4 bit binary numbers,
Let us compare those two numbers
Condition (1), when A_{1} > B_{1} i.e. A_{1} = 1 and B_{1} = 0, ⇒ A > B or G = 1.
Condition (2), when A_{1} = B_{1} and A_{2} > B_{2} i.e. A_{2} = 1 and B_{2} = 0 ⇒ A >B or G = 1.
Condition (3), when A_{1} = B_{1} and A_{2} = B_{2} and A_{3} > B_{3} i.e. A_{3} = 1 and B_{3} = 0 ⇒ A >B or G = 1.
Condition (4), when A_{1} = B_{1}, A_{2} = B_{2}, A_{3} = B_{3} and A_{4} > B_{4} i.e. A_{4} = 1 and B_{4} = 0 ⇒ A > B or G = 1.
Hence, G = 1 if either of the above equations is true,
Similarly,
Now,
Again when,
The logic circuit can be drawn from the above equations (i), (ii) and (iii).
This is 4bit digital comparator.

## IC of Digital Comparator

The IC available for 4 bit**digital comparator**is IC 7485. For more bit comparison, more than one such ICs can be cascaded. This IC has three terminals, labeled as (A < B )

_{in}, (A = B)

_{in}and (A > B)

_{in}and other three terminals labeled as, as (A < B)

_{out}, (A = B)

_{out}and (A > B)

_{out}. During cascading of two 7485 ICs, (A < B)

_{out}, (A = B)

_{out}and (A > B)

_{out}of lower order IC would be connected to (A < B)

_{in}, (A = B)

_{in}and (A > B)

_{in}of higher order IC, respectively.