MCQs on Microprocessor


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01․ ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line.
RIM
SIM
EI
DI

Set Interrupt Mask (SIM) – It is used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. First the required value is loaded in accumulator then SIM will take the bit pattern from it.

02․ _____________is used to read the status of the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by loading into the A register a byte which defines the condition of the mask bits for the interrupts.
SIM
RIM
DI
EI

Read Interrupt Mask (RIM) – This instruction is used to read the status of the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by loading into the A register a byte which defines the condition of the mask bits for the interrupts. It also reads the condition of SID (Serial Input Data) bit on the microprocessor.

03․ How many segments are there in 8086?
6.
4.
3.
2.

There are four segments in 8086: Code, Stack, Data and Extra.

04․ The first microprocessor to include virtual memory in the intel microprocessor family is
80286
80386
80486
Pentium

80286 is a 16 bit microprocessor consisting of virtual memory.

05․ Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments.
Both A & R are true and R is the correct explanation of A.
Both A & R are true but R is not the correct explanation of A.
A is true but R is false.
A is false but R is true.

Both A & R are true but R is not the correct explanation of A.

06․ Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low.
Both A & R are true and R is the correct explanation of A.
Both A & R are true but R is not the correct explanation of A .
A is true but R is false.
A is false but R is true.

Both are correct and (R) is the correct explanation of (A)

07․ Program counter in a digital computer
Counts the numbers of programs run in the machine.
Counts the number of times a subroutine is called.
Counts the number of times the loops are executed.
Points the memory address of the next instruction to be fetched.

Program counter is a 16-bit register which points the address of next instruction to be fetched.

08․ During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?
T1 OP code fetch
T2 OP code fetch
T3 OP code fetch
T4 OP code fetch

During T3 time period opcode from memory are loaded into instruction register (IR).

09․ Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor?
1, 3, 5
2, 3, 5
1, 2, 5
1, 3, 4

Among eight bit (0 to 7) 1st, 3rd and 5th bits are undefined in a flag register.

10․ At the beginning of a fetch cycle, the contents of the program counter are
incremented by one.
transferred to address bus.
transferred to memory address register .
transferred to memory data register.

Memory Address Register (MAR) is used to hold the address of memory before it is placed on address bus.

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