MCQs on Microprocessor

01․ How many bytes in a zero memory page should be reserved for vectors used by RST instructions?

First 64 bytes in a zero memory page should be reserved for vectors used by RST instructions.

02․ CALL instruction is a ______ instruction.

CALL instruction is a 3 bytes instruction. The processor calls the subroutine, address of which is specified in the second and third bytes of the instruction.

03․ The characteristics of RESET OUT signal is/are

RESET OUT signal indicates that microprocessor is being reset. This signal can be used to reset other devices. The signal is synchronized to the processor clock and lasts an integral number of clock periods.

04․ DMA signal/signals in 8085 is/are

HOLD, HLDA and READY all are Direct Memory Access signals of 8085.

05․ Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions?

PUSH: This instruction pushes the register pair onto stack. The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the highorder register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Eg: - PUSH B PUSH A POP: This instruction pop off stack to register pair. The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Eg: - POP H POP A

06․ XCHG instruction exchanges the content of H-L with ______ register pair.

Exchange H and L with D and E. The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E.

07․ SPHL instruction copies the content of H-L register pair to the _________.

SPHL: - This instruction copies H and L register to the stack pointer. The instruction loads the contents of the H and L registers into the stack pointer register, the contents of the H register provide the high-order address and the contents of the L register provide the low-order address. The contents of the H and L registers are not altered.

08․ The control flags in 8086 are:

The three control flags of 8086 are:

1. The Trap flag(TF)
2. The interrupt flag(IF)
3. The direction flag(DF)

The Trap Flag: Setting TF puts the processor into single step mode for debugging. If TF=1, the CPU automatically generates an internal interrupt after each instruction, allowing a program to be inspected as it executes instruction by instruction. The Interrupt Flag: If IF=1, the CPU will recognize external interrupt request (Interrupt Disabled). If IF=0, then interrupt is disabled. The Direction Flag: This bit is especially for string instructions. If DF=1, the string instruction will automatically decrement the pointer. If DF = 0, the string instruction will automatically increment the pointer.

09․ RST0 - RST7 are the __________ in 8085.

Software Interrupts are those which are inserted in between the program which means these are mnemonics of microprocessor. There are 8 software interrupts in 8085 microprocessor. They are – RST 0, RST 1, RST 2, RST 3, RST 4, RST 5, RST 6, RST 7.

10․ ________is the only non-vectored interrupt in 8085 microprocessor.

Non-Vectored Interrupts are those in which vector address is not predefined. The interrupting device gives the address of sub-routine for these interrupts. INTR is the only non-vectored interrupt in 8085 microprocessor.