01․ A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as
We know data bus (Also known as Memory bus) allows transfer of information between main memory and the CPU.
02․ The operations executed by two or more control units are referred as
The operations executed by two or more control units are referred as Macro-operations.
03․ Consider the following registers: 1. Accumulator and flag register 2. B and C register 3. D and E register 4. H and L register Which of these 8-bit registers of 8085 microprocessor can be paired together to make a 16-bit register?
We can not combine accumulator and flag register to form 16-bit register whereas B & C, D & E, H & L can be combined to form a 16-bit register.
04․ In a microcomputer , the address of memory locations are binary numbers that identify each memory circuit where a byte is stored. If a microcomputer uses 20-bit address, then numbers of different memory locations are
A 20-bit address can allow 220 different memory locations.
05․ Number of Hex digits needed to represent the 20-bit address of a memory location are
Since one hex digit can represent 4 binary bits, it will take 5 hex digits to represent the 20-bit address of a memory location.
06․ HLDA signal in 8085 performs the following operation:
HLDA or Hold Acknowledge indicates that the CPU has received the HOLD request and that it will relinquish the bus in the next clock cycle. HLDA goes low after the Hold request is removed. The CPU takes the bus one half-clock cycle after HLDA goes low.
07․ The field, which is never present in an assembly language statement, is
There is nothing called “continue” in assembly language statement.
08․ Bus Interface Unit (BIU) in 8086 performs the following functions:
BIU has the following functions: Instruction fetching, Instruction queuing, Operand fetching and storage, Address relocation and Bus control.
09․ In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.
The BIU uses a mechanism known as an instruction stream queue to implement a pipeline architecture. This queue permits prefetch of up to six bytes of instruction code. Whenever the queue of the BIU is not full, it has room for at least two more bytes and at the same time the EU is not requesting it to read or write operands from memory, the BIU is free to look ahead in the program by prefetching the next sequential instruction.
10․ During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction.
EU tests the status and control flags and updates them based on the results of executing the instruction, during the execution of the instruction.