01․ The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are
“IN 8-bit port address” is an 8 bit port address. The maximum port range is up to (FF)H. For executing this instruction the high order (A15-A8) port address is duplicated to low order (A7 -A0) port address. So high order address bus has same content as low order address bus.
02․ Which one of the following ICs is used to interface keyboard and display?
INTEL 8251 IC is a programmable communication interface used for serial data transmission. INTEL 8279 IC is a programmable interfacing device for keyboard and display device. INTEL 8259 IC is a programmable interrupt controller used when several I/O devices transfer data using interrupt. INTEL 8253 IC is a programmable counter/ interval timer used in real time applications for timing and counting function.
03․ Which one of the following interrupt/interrupts is/are only level triggering?
TRAP is edge as well as level triggered. RST 7.5 is a positive edge triggered interrupt. RST 6.5 and RST 5.5 are level triggered interrupt.
04․ Which one of the following instruction may be used to clear the accumulator content irrespective of its initial value?
There is no such instruction like CLRA and MOV A, 00H. There is no guarantee that ORA A will result in zero but we can be sure SUB A will reset or clear the content of accumulator.
05․ The execution of RST n instruction causes the stack pointer to
RST instructions are equivalent to 1 byte call instructions or one of the eight memory locations on page 0.The instruction is generally used in conjunction with interrupts. When RST n is executed the value of program counter is pushed on the stack pointer. It means that low order address of the program counter is stored in the next location (stack pointer -2) of stack.
06․ The stack is nothing but a set of
Stack is a part of RAM which is used to store temporary data and also the content of PC when sub routines are used.
07․ S0 and S1 pins are used for
S0 and S1 pins indicate the status of processor. These are status signals sent by the processor to distinguish various types of operation like HALT, WRITE, READ and FETCH.
08․ Pick out the matching pair
Only S0 and S1 are related to wait status, rest are not matching to each other in any way. READY is a input pin to indicate the status of the input device and RIM is a interrupt mask instruction. HOLD is input signal for control of bus and DMA is instruction for direct memory access. SID is a input pin for serial input and SIM is input instruction for interrupt mask.
09․ In order to save accumulator value on the stack, which of the following instruction may be used
There is no such instruction like, PUSH A, PUSH SP. PUSH PSW will allow to push or save the value of accumulator as well as flag register to stack.
10․ A single instruction to clear the lower nibble of accumulator in 8085 language assembly is
ANI operation means AND immediate with Accumulator. FOH→ 1111 0000 Whatever may be content of accumulator, after ANDing that with 1111 0000, lower nibble of accumulator will be clear.