MCQs on Microprocessor

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01․ Which of the following interrupt is only edge sensitive?
RST 7.5
TRAP
RST6.5
RST 5.5

Among all interrupts RST 7.5 is only positive edge sensitive.RST 6.5 and RST 5.5 are level sensitive triggered.TRAP is both level and edge sensitive triggered.
02․ What is the vector address of INTR?
0024H
003CH
0034H
No address is available

INTR is the one and only non-vectored interrupt in 8085 microprocessor so it has no addressing available in 8085 microprocessor. For INTR, external hardware is used to transfer program to specific CALL location.
03․ On receiving an interrupt from an I/O device, the CPU
halts for a predetermined times
hands over the control of address bus and data bus to the interrupting device
branches off to the interrupt service routine immediately
branches off to the interrupt serviceroutine after completion of the current instruction

After receiving an interrupt signal at first microprocessor will complete the current instruction and then it will branch off to the interrupt service routine.
04․ The ALE line of 8085 microprocessor is used to
latch the output of an I/O instruction into an external latch
deactivate the chip-select signal from memory device
latch the 8-bit of address lines AD0-AD7 into an external latch
find the interrupt enable status of the TRAP interrupt

The ALE (Address Latch Enable) line of 8085 microprocessor is used to latch the 8-bit of address lines AD0-AD7 into an external latch.
05․ The first operation performed in INTEL 8085 microprocessor after RESET is
instruction fetch from 0000H
memory read from the location 0000H
instruction fetch from location 8000H
stack initialization

After RESET instruction the processor execution will initialize from 0000H.
06․ After the execution of CMP A instruction
ZF is set and CY is reset
ZF is set and CY is unchanged
ZF is reset and CY is set
ZF is reset and CY is unchanged

CMP R instruction compares the content of register R to accumulator and accordingly Zero and Carry flag will be affected. By CMP A instruction content of the accumulator is compared with the accumulator itself.The condition is that if A is same as comparing register zero flag will be set and carry flag will reset.
07․ The 8085 microprocessor will enter into INA cycle after recognition of
any interrupt
TRAP only
INTR only
RST 7.5,RST 6.5 & RST 5.5 only

The 8085 microprocessor will enter into INA cycle after recognition of INTR only.
08․ Which of the following lists the interrupt in decreasing order of priority?
TRAP, RST 5.5, RST 6.5, RST 7.5, INTR
INTR, TRAP, RST 7.5, RST 6.5, RST 5.5
TRAP, RST 7.5, RST 6.5, RST 5.5, INTR
RST 7.5, RST 6.5, RST 5.5, TRAP, INTR

Priority wise decreasing order of interrupts is TRAP, RST 7.5, RST 6.5, RST 5.5, INTR. The first four interrupt are vectored interrupt. TRAP is highest priority interrupt but has a lower priority than HOLD signal.
09․ The interrupt vector address for TRAP is
0000H
0024H
0018H
002CH

For vectored interrupt the microprocessor assigns a specified memory location. The interrupt vector address for TRAP is 0024H.
10․ In order to reset the carry without affecting the accumulator content one has to use,
SUB A
XRA A
ORA A
CMC

After OR operation CY (carry flag) & AC (auxiliary carry flag) is reset by default. So this is the most suitable instruction to reset carry.
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