MCQs on Microprocessor

01․ EPROMs are preferred for storing programs while developing new microprocessor based system. Because of their

non-volatile characteristic

erasable and programmable characteristic

random access characteristic

all the above characteristic

EPROM(Erasable Programmable Read Only Memory) has non-volatile, erasable and programmable characteristics.

02․ When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are

not affected

always set

always reset

affected indicating specific conditions

Data transfer operation does not affect any of the flags in 8085 microprocessor.

03․ Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be

00000100

01000000

11000100

010001000

SUB B allows subtraction of content B from A and the result is stored in the accumulator. In the given problem we have to subtract 0100 0000 from 0000 0100.

Hence the content of the accumulator after execution the given instruction will be 11000100.

04․ Let the content of register C be 00000000 before the instruction DCR C is executed. The content of register C after the after the execution of this instruction will be

00000000

11111111

00000001

None

DCR C instruction allows C to decrement the content of register C by 1. Binary of 1 is 00000001. We have to subtract 00000001 from 00000000.

05․ In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is

256

512

65536

Using I/O mapped I/O technique 256 input device and 256 output device i.e. total 512 input/output devices can be connected to the microprocessor.

06․ Cycle stealing mode of DMA operation involves

DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device

While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

Data transfer takes place between the I/O device and memory during every alternate clock cycle

The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses

Cycle stealing mode of DMA operation takes place while the microprocessor is executing a program and an interface circuit takes over control of address, data and control buses when not in use by microprocessor.

07․ Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions

the microprocessor can be interrupted by a non-mask able interrupt

the microprocessor cannot be interrupted by any interrupt

the microprocessor cannot be interrupted by any mask able interrupt

all interrupts except non-maskable interrupt are disabled

EI (Enable Interrupt) instruction should be provided at the beginning of any program so that it can respond to any interrupts. If EI is not provided in the program then microprocessor cannot be interrupted by any interrupt.

08․ The reason for the presence of ALE pin in 8085, but not in 6800 is that

8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O

8085 has 5 interrupts lines, whereas 6800 has only two

8085 has multiplexed bus, whereas 6800 does not have

None

8085 has multiplexed bus which acts as address bus as well as data bus(AD₀-AD₇). So ALE is required to indicate status of the buses.

09․ Which of the following interrupt is both level and edge sensitive?

RST 5.5

INTR

RST 7.5

TRAP

TRAP is one and only interrupt having both level and edge sensitive triggering.

10․ The addressing mode in instruction PUSH B is

direct

immediate

The addressing mode in instruction PUSH B is register indirect. The contents of the source registers are not altred after the PUSH instruction.

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